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How does a Metastable signal look like?

Updated: Apr 16, 2024

This question might have crossed your mind at least once while reading articles about Clock Domain Crossing (CDC). Sure enough, that is a good question. It might get asked in an interview also, just to check your understanding of the issues associated with metastability. So, what is the answer to this? If you were given two choices for the question, “If a flip-flop goes into metastable state, it’s output is:”

1.      Either 0 or 1

2.      Neither 0 nor 1

What would you pick?


Well, the answer is not that straight forward. You see, in digital world there is only 0 or 1, nothing in between. At least that is what we have been told all our life. But is it really like that? Not quite! Let me explain.


So, 0 and 1 are nothing but voltage levels. For example, in a design that works between 0 and 5V, we assume 0-1V is logic 0 and 4.3-5V is logic 1. These are just hypothetical values, don’t read too much into it, but real-world example is not far off than this. Now think practically, is something between 0 and 1 not possible? Of course it is. There is a whole variety of voltage range in between 0 and 1. But but but… our design should never go in that voltage range because if it does, then we cannot guarantee an expected operation of our design.


Now come back to digital world. We have designed our systems such that it only understands 0 or 1. A question arises though. What will happened if, let’s say, a flop sees a voltage level which is neither logic 0 nor logic 1? The answer is simple: WE DO NOT KNOW. A flop expects only logic 0 or logic 1 at its input. If it sees a voltage level that is neither, the flop will “assume” it as a logic 0 or a logic 1 with no certainty whatsoever. It is unpredictable. It can be 0, it can be 1.


I think it is clear why I am talking so much about signals that is neither 0 nor 1. This is how a metastable signal looks like in real life:



As you can see, the metastable signal is neither 0 nor 1. The logic consuming this signal will “assume” it is a logic 0 or a logic 1, with no certainty. That is the issue with metastable signals. We cannot afford this unpredictability and that is why we spend so much time and resource on resolving metastability.


This picture is invaluable as metastability is not something that can happen on command. It is not easy to recreate metastable signals in a lab. Everything about metastable signals is unpredictable.

So, what will be your answer next time someone asks this question to you?

Metastable signals are neither 0 nor 1. The logic downstream can see it as either logic 0 or a logic 1, but we do not know which!


That concludes this article. Hope to see you in the next one!


Resources:

Slide 59 of lecture by Professor Onur Mutlu

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